Simple Traffic Controller (FPGA)
Like Arturo Murillo

Simple Traffic Controller (FPGA)

Simple Traffic Controller (FPGA)

Description:

Published: April 23, 2020 0 0 129
By: Arturo Murillo, California State Polytechnic University-Pomona
Category: Engineering
Hashtags: #CalPoly #Education #FPGA #Leadership #Training #Verilog

In this project, we had to design a traffic light using Verilog and a software tool like Vivado. We used the nexus 4 ddr FPGA to implement and drive the project. The source code is found in my Github account. GitHub account to view code next slide.

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Simple Traffic Controller (FPGA) 232.9 KB