Published: April 24, 2020
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By: Arturo Murillo, California State Polytechnic University-Pomona
Hashtags: #Design #Engineering #Leadership #Project #Teamwork
This senior project involves Fault Tolerance the studying of failures in reconfigurable computing devices. It'is a part of our collaboration with JPL/NASA. The board we are using is the Polar Splash Kit from Microsemi (Microchip) FPGA. This board is heavily used by the space division on wide-range of application for the cube-sat.