Member Since October 30, 2015
Implementation of The FIR using VHDL and FPGA
Constructed a full ADC to DAC system, ADC was used ARTIX-7 X_ADC core internal 12-bit analog to digital...
T-Rex Running Game developed by Verilog
This document presents the basic design used to recreate the Chrome Offline T-Rex Running Game. It includes...
Northrop Grumman UGV
Hardware Team Member • Designed and Generate the PL on the PL side of MicroZed 7020. • Designed...