Member Since November 25, 2018
This project involved the use of a FIFO buffer in a Nexys 4 FPGA. The FIFO can store up to 4 bytes but...
Weather Detection / Temperature Display
This project illustrates an SoC on a Nexys 4 FPGA, most of the drivers and hardware were created in...
Simple Traffic Controller (FPGA)
In this project, we had to design a traffic light using Verilog and a software tool like Vivado. We...